JPH0416018B2 - - Google Patents

Info

Publication number
JPH0416018B2
JPH0416018B2 JP4586885A JP4586885A JPH0416018B2 JP H0416018 B2 JPH0416018 B2 JP H0416018B2 JP 4586885 A JP4586885 A JP 4586885A JP 4586885 A JP4586885 A JP 4586885A JP H0416018 B2 JPH0416018 B2 JP H0416018B2
Authority
JP
Japan
Prior art keywords
polycrystalline silicon
groove
silicon
silicon substrate
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4586885A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61204949A (ja
Inventor
Takashi Hosaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP4586885A priority Critical patent/JPS61204949A/ja
Publication of JPS61204949A publication Critical patent/JPS61204949A/ja
Publication of JPH0416018B2 publication Critical patent/JPH0416018B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
JP4586885A 1985-03-08 1985-03-08 半導体装置の製造方法 Granted JPS61204949A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4586885A JPS61204949A (ja) 1985-03-08 1985-03-08 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4586885A JPS61204949A (ja) 1985-03-08 1985-03-08 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS61204949A JPS61204949A (ja) 1986-09-11
JPH0416018B2 true JPH0416018B2 (en]) 1992-03-19

Family

ID=12731180

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4586885A Granted JPS61204949A (ja) 1985-03-08 1985-03-08 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS61204949A (en])

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006324644A (ja) * 2005-04-18 2006-11-30 Nec Electronics Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS61204949A (ja) 1986-09-11

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